1. Technical Field
The present invention relates to circuit design verification, and more specifically, to circuit design verification using checkpointing.
2. Related Art
A circuit design after being created is usually verified (i.e., tested) before being actually fabricated. Typically, the circuit design is verified by running a simulation program on a computer (not shown) during which different inputs (called stimuli) are in turn applied to the circuit design and the signals at the outputs and different nodes of the circuit design are collected and compared with expected values. If a mismatch occurs, the circuit design is considered defective and must be re-designed. The number of different stimuli may be extremely large and, as a result, testing the circuit design with all possible stimuli would take a very long time. Therefore, there is a need for a method for verifying the circuit design in relatively less time than in the prior art.